Techniques for enhancing the breakdown voltage of high voltage semiconductor devices are well known in the art. In the past, a broad range of semiconductor devices including P-N junction diodes, bipolar and MOS transistors, and lateral PNP structures have been fabricated using a metal plate electric field termination technique. The metal field plate increases the diffused P-N junction breakdown voltage while being compatible with existing fabrication technology.
As is well known, electrical isolation between semiconductor device structures can be accomplished with insulating films formed on the top surface of the device or with annular rings diffused around the individual structures which are biased to selected electrical potentials, or a combination of both. With very high voltage devices, very intense electric fields with steep electric field gradients are created around the corners of the individual structures, resulting in breakdown voltages which are substantially less than the bulk values associated with the individual constituent materials. The insulation techniques developed to enhance the breakdown voltages in these devices usually require insulating films deposited in conjunction with a surrounding metal plate.
The well known basic concepts of metal field plate termination are detailed in "Surface Breakdown in Silicon Planar Diodes Equipped with Field Plate" by F. Conti and M. Conti, Solid-State Electronics 1972, Vol. 15. A simple example is a high voltage reverse biased junction diode. The diode comprises a P-type diffused base region in an N-type [111] silicon substrate forming a P-N junction. An annular guard ring is diffused into the substrate to encompass the high voltage base junction. A conventional field oxide is grown on the surface, extending from the base region to the guard ring. Additional insulating layers are typically deposited on the field oxide for passivation before metal contacts are deposited on both the base region and the guard ring. The guard ring itself is electrically biased, usually to the substrate potential.
It has also been found that a structure's breakdown voltage can be enhanced by overlaying both the guard ring and high voltage base region metal contact onto the field oxide structure. Both metal overlay regions extend out over the field oxide by a distance much larger than the junction depth. The gap across the field oxide is usually equivalent in length to the metal plate extension.
Although the structure described above provides improved performance, it is still unacceptable for certain applications. A problem with the prior art metal plate termination structures is that any charge (typically positive) found in the insulating film over the field oxide accumulates opposite charge (typically negative) at the insulator-field oxide interface due to capacitive plate effects. Corresponding image charges are formed at the field oxide-silicon substrate interface, thereby limiting the horizontal extent of the depletion region in the substrate along the field oxide substrate interface. As a result, the breakdown voltage of the high voltage function is lowered. In addition, during high temperature reverse bias testing of these structures, breakdown voltages will be further reduced due to additional charge accumulation from the external environment, such as from packaging materials and contamination on the device surface.
In an effort to minimize this effect, prior art structures are hermetically packaged or have various slightly conductive layers deposited between the overlaid metal contacts, which allows neutralizing charge to migrate in the layer and dissipate any accumulated charge. For example, in "Design Considerations for High-Voltage Overlay Annular Diodes", IEEE Transactions on Electron Devices, Vol. ED-19, No. 1, January 1972; and "Enhancement of Breakdown Properties of Overlay Annular Diodes by Field Shaping Resistive Films", Solid-State Electronics, 1972, Vol. 15; D. S. Zoroglu and L. E. Clark describe the use of slightly conductive, insulating films to be deposited in between the overlaid metal contacts on the field oxide structures. Unfortunately, the slight conductivity associated with these films lowers the electrical insulation provided by the film between the metal contacts, ultimately limiting the breakdown voltage of the structure.
Since some sort of insulating film must be between the metal contacts themselves to prevent electrical breakdown, various films such as slightly doped or undoped polysilicon can be deposited therebetween in an effort to redistribute the charge. However, none of these techniques have been shown to be totally effective or reliable. For example, a Motorola device (MOC3060) using such a technique has undergone high temperature reverse bias testing (400 V at 125.degree. C.) and yielded as high as a 25 percent rejection rate.
It would be desirable to develop a method and apparatus for redistributing the accumulated charge at the interface between the field oxide and the silicon substrate which would enhance the depletion region of the high voltage P-N junction, improve electric field termination, and raise electrical breakdown voltage. Such a technique must be compatible with existing semiconductor processing technology and allow for the use of high temperature processing. The present invention is directed towards such a method and apparatus.